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SX126x Implicit Header Mode Timeout Workaround

Semtech Transceivers SX126x family
#1

Hello everyone,

Recently, it was pointed out to me that there is some discrepency in the datasheet for SX1268 (Rev. 1.2).

In section 15.3 Implicit Header Mode Timeout, a workaround to fix an issue with timeout in implicit mode is shown, but there is some confusion as to which register should be actually modified (marked in red):

Screenshot_30
Screenshot_301655×944 165 KB

Sooo … which is it? 0x902 or 0x920? Thanks!

#2

Hi @gromes.jan,

Thanks for your message - there is effectively an error in the datasheet. The register to be used is 0x0902.

You can find a reference implementation of this workaround in the driver (see https://github.com/Lora-net/sx126x_driver/blob/master/src/sx126x.c#L1334).

#3

Thanks - makes sense, but I just wanted to check. Would it be possible to update the datasheet?

#4

I added that to the list of changes.

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