I’m creating this post because I’m having trouble to get an answer from the SX1261 during SPI communication.
I am using a CC1312R as a master, and SX1261MB2BAS Shield as a slave.
SPI settings on the CC1312R are the following :
- CLK freq = 500 kHz
- POL = 0
- PHA = 0
I wanted to test the SPI communication between the SX1261 and CC1312R by simply reading the register containing its LoRa syncword.
Do to so I sent the following frame : 0x1D 0x07 0x40 0x00 0x00 0x00.
However I can’t seem to be able to get an answer from the SX1261, which only sends 0x80 as the first byte everytime, no matter what opcode I send it.
I think on MISO I should get : 0x00 STATUS STATUS STATUS 0x14 0x24 ?
You can find attached the screen capture of CLK, MOSI, MISO, NSS, BUSY, NRST and DIO1 (which I didn’t configure for this test). I think it respects the timing requirements given in table 8-1 of the SX1261 datasheet.
Could the 4µs delay between each SPI frame (which is measured by timing markers P0) be the cause of the problem ?
Thanks for your help.